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  rev. f information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a ad8055/AD8056 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: 781/326-8703 ?analog devices, inc., 2002 low cost, 300 mhz voltage feedback amplifiers functional block diagrams features low cost single (ad8055) and dual (AD8056) easy to use voltage feedback architecture high speed 300 mhz, ? db bandwidth (g = +1) 1400 v/  s slew rate 20 ns settling to 0.1% low distortion: ?2 dbc @ 10 mhz low noise: 6 nv/ hz low dc errors: 5 mv max v os , 1.2  a max i b small packaging ad8055 available in sot-23-5 AD8056 available in 8-lead msop excellent video specifications (r l = 150  , g = +2) gain flatness 0.1 db to 40 mhz 0.01% differential gain error 0.02  differential phase error drives 4 video loads (37.5  ) with 0.02% and 0.1  differential gain and differential phase low power,  5v supplies 5 ma typ/amplifier power supply current high output drive current: over 60 ma applications imaging photodiode preamp video line driver differential line driver professional cameras video switchers special effects a-to-d driver active filters product description the ad8055 (single) and AD8056 (dual) voltage feedback amplifiers offer bandwidth and slew rate typically found in current feedback amplifiers. additionally, these amplifiers are easy to use and available at a very low cost. despite their low cost, the ad8055 and AD8056 provide excellent overall performance. for video applications, their differential gain and phase error are 0.01% and 0.02 into a 150 ? load, and 0.02% and 0.1 while driving four video loads (37.5 ? ). their 0.1 db flatness out to 40 mhz, wide bandwidth out to 300 mhz, along with 1400 v/ s slew rate and 20 ns settling time, make them useful for a variety of high speed applications. the ad8055 and AD8056 require only 5 ma typ/amplifier of supply current and operate on dual 5 v or single +12 v power supply, while being capable of delivering over 60 ma of load current. all this is offered in a small 8-lead plastic dip, 8-lead soic packages, 5-lead sot-23-5 package (ad8055), and an 8-lead msop package (AD8056). these features make the ad8055/AD8056 ideal for portable and battery powered a pplications where size and power are cri tical. these amplifiers in the r-8 and n-8 packages are available in the extended tempera- ture range of ?0 c to +125 c. frequency ?hz 0.3m 1g gain ?db 1m 10m 100m 5 4 ? 3 2 1 0 ? ? ? ? g = +1 r f = 0  r c = 100  g = +2 r f = 402  g = +5 r f = 1000  g = +10 r f = 909  v out = 100mv p-p r l = 100  v in r c 50  r s r f r l v out figure 1. frequency response n-8 and r-8 1 2 3 4 8 7 6 5 (not to scale) ad8055 ?n ? s +in +v s v out nc nc nc nc = no connect sot-23-5 (rt) 1 2 3 5 4 (not to scale) ?n +in +v s v out ad8055 ? s n-8, r-8, msop (rm) 1 2 3 4 8 7 6 5 (not to scale) AD8056 ?n1 ? s +in1 +v s out ?n2 out1 +in2
e2e rev. f ad8055/AD8056 ad8055a/AD8056a parameter conditions min typ max unit dynamic performance ? db bandwidth g = +1, v o = 0.1 v p-p 220 300 mhz g=+ 1, v o = 2 v p-p 125 150 mhz g=+ 2, v o = 0.1 v p-p 120 160 mhz g=+ 2, v o = 2 v p-p 125 150 mhz bandwidth for 0.1 db flatness v o = 100 mv p-p 25 40 mhz slew rate g = +1, v o = 4 v step 1000 1400 v/ s g = +2, v o = 4 v step 750 840 v/ s settling time to 0.1% g = +2, v o = 2 v step 20 ns rise and fall time, 10% to 90% g = +1, v o = 0.5 v step 2 ns g = +1, v o = 4 v step 2.7 ns g = +2, v o = 0.5 v step 2.8 ns g = +2, v o = 4 v step 4 ns noise/harmonic performance total harmonic distortion f c = 10 mhz, v o = 2 v p-p, r l = 1 k ? ?2 dbc f c = 20 mhz, v o = 2 v p-p, r l = 1 k ? ?7 dbc crosstalk, output to output (AD8056) f = 5 mhz, g = +2 ?0 db input voltage noise f = 100 khz 6 nv/ hz input current noise f = 100 khz 1 pa/ hz differential gain error ntsc, g = +2, r l = 150 ? 0.01 % ntsc, g = +2, r l = 37.5 ? 0.02 % differential phase error ntsc, g = +2, r l = 150 ? 0.02 degree ntsc, g = +2, r l = 37.5 ? 0.1 degree dc performance input offset voltage 35 mv t min to t max 10 mv offset drift 6 v/ c input bias current 0.4 1.2 a t min to t max 1 a open-loop gain v o = 2.5 v 66 71 db t min to t max 64 db input characteristics input resistance 10 m ? input capacitance 2pf input common-mode voltage range 3.2 v common-mode rejection ratio v cm = 2.5 v 82 db output characteristics output voltage swing r l = 150 ? 2.9 3.1 v output current * v o = 2.0 v 55 60 ma short circuit current * 110 ma power supply operating range 4.0 5.0 6.0 v quiescent current ad8055 5.4 6.5 ma t min to 125 c 7.6 ma t min to 85 c 7.3 ma AD8056 10 12 ma t min to 125 c 13.9 ma t min to 85 c13.3ma power supply rejection ratio +v s = +5 v to +6 v, ? s = ? v 66 72 db ? s = ? v to ? v, +v s = +5 v 69 86 db operating temperature range 8055art, 8056arm ?0 +85 c 8055ar, 8055an, 8056ar, 8056an ?0 +125 c * output current is limited by the maximum power dissipation in the package. see the power derating curves. specifications subject to change without notice. (@ t a = 25  c, v s =  5 v, r f = 402  , r l = 100  , gain = +2, unless otherwise noted.) especifications
ad8055/AD8056 e3e rev. f absolute maximum ratings 1 supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.2 v internal power dissipation 2 plastic dip package (n) . . . . . . . . . . . . . . . . . . . . . . 1.3 w small outline package (r) . . . . . . . . . . . . . . . . . . . . . 0.8 w sot-23-5 package (rt) . . . . . . . . . . . . . . . . . . . . . . 0.5 w msop package (rm) . . . . . . . . . . . . . . . . . . . . . . . . 0.6 w input voltage (common-mode) . . . . . . . . . . . . . . . . . . . v s differential input voltage . . . . . . . . . . . . . . . . . . . . . . 2.5 v output short circuit duration . . . . . . . . . . . . . . . . . . . . . .o bserve power derating curves storage temperature range n, r . . . . . . . . e65 c to +150 c operating temperature range (a grade) . . e40 c to +125 c lead temperature range (soldering 10 sec) . . . . . . . . 300 c notes 1 stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 specification is for device in free air: 8-lead plastic dip package:  ja = 90 c/w 8-lead soic package:  ja = 125 c/w 5-lead sot-23-5 package:  ja = 180 c/w 8-lead msop package:  ja = 150 c/w maximum power dissipation t he maximum power that can be safely dissipated by the ad8055/ AD8056 is limited by the associated rise in junction temperature. the maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature of the plastic, approximately 150 c. exceeding this limit temporarily may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. exceeding a junction temperature of 175 c for an extended period can result in device failure. while the ad8055/AD8056 are internally short circuit protected, this may not be sufficient to guarantee that the maximum junction temperature (150 c) is not exceeded under all conditions. to ensure proper operation, it is necessary to observe the maximum power derating curves. 0.5 ambient temperature e  c sot-23-5 maximum power dissipation e w e55 e45 e35 e25 e15 e5 5 15 25 35 45 55 65 75 85 95 105 115 125 0.0 1.0 1.5 2.0 2.5 msop-8 soice8 pdip-8 figure 2. plot of maximum power dissipation vs. temperature for ad8055/AD8056 caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the ad8055/AD8056 feature proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. warning! esd sensitive device ordering guide model temperature range package description package option branding code ad8055an e40 c to +125 cp lastic dip n-8 ad8055ar e40 c to +125 cs mall outline package (soic) soic-8 ad8055ar-reel e40 c to +125 c 13" tape and reel soic-8 ad8055ar-reel7 e40 c to +125 c 7" tape and reel soic-8 ad8055art-reel e40 c to +85 c 13" tape and reel rt-5 h3a ad8055art-reel7 e40 c to +85 c 7" tape and reel rt-5 h3a AD8056an e40 c to +125 cp lastic dip n-8 AD8056ar e40 c to +125 cs mall outline package (soic) soic-8 AD8056ar-reel e40 c to +125 c 13" tape and reel soic-8 AD8056ar-reel7 e40 c to +125 c 7" tape and reel soic-8 AD8056arm e40 c to +85 c msop rm-8 h5a AD8056arm-reel e40 c to +85 c 13" tape and reel rm-8 h5a AD8056arm-reel7 e40 c to +85 c 7" tape and reel rm-8 h5a
ad8055/AD8056 e4e rev. f etypical performance characteristics v in 50  hp8130a pulse generator t r /t f = 1ns ad8055 v out 4.7  f 0.01  f 0.001  f 4.7  f 0.01  f 0.001  f +v s ev s 6 7 2 3 4 100  100  tpc 1. test circuit, g = +1, r l = 100  tpc 2. small step response, g = +1 tpc 3. large step response, g = +1 hp8130a pulse generator t r /t f = 0.67ns v in 57  ad8055 v out 4.7  f 0.01  f 0.001  f 4.7  f 0.01  f 0.001  f +v s ev s 402  402  6 7 2 3 4 100  tpc 4. test circuit, g = e1, r l = 100  tpc 5. small step response, g = e1 tpc 6. large step response, g = e1
ad8055/AD8056 e5e rev. f frequency e hz 0.3m 1g gain e db 1m 10m 100m 5 4 e5 3 2 1 0 e1 e2 e3 e4 g = +1 r f = 0  r c = 100  g = +2 r f = 402  g = +5 r f = 1000  g = +10 r f = 909  v out = 100mv p-p r l = 100  v in r c 50  r s r f r l v out tpc 7. small signal frequency response, g = +1, g = +2, g = +5, g = +10 frequency e hz 0.3m 1g gain e db 1m 10m 100m g = +1 r f = 0  g = +2 r f = 402  g = +5 r f = 1000  g = +10 r f = 909  v out = 2v p-p r l = 100  5 4 e5 3 2 1 0 e1 e2 e3 e4 tpc 8. large signal frequency response, g = +1, g = +2, g = +5, g = +10 frequency e hz 0.3m 1g 1m 10m 100m 0.5 0.4 e0.5 0.3 0.2 0.1 0 e0.1 e0.2 e0.3 e0.4 v out = 100mv g = +2 r l = 100  r f = 402  output e db tpc 9. 0.1 db flatness frequency e hz 10k 10m 100k 1m v out = 2v p-p g = +2 r l = 100  2nd 3rd e50 e100 e60 e70 e80 e90 100m harmonic distortion e dbc tpc 10. harmonic distortion vs. frequency frequency e hz 10k 10m 100k 1m v out = 2v p-p g = +2 r l = 1k  2nd 3rd e50 e100 e60 e70 e80 e90 100m harmonic distortion e dbc tpc 11. harmonic distortion vs. frequency v out e v p-p 0 1.2 0.4 0.8 g = +2 r l = 1k  2nd 3rd e50 e90 e60 e70 e80 1.6 distortion e dbc 2.0 2.4 2.8 3.2 3.6 4.0 e40 tpc 12. distortion vs. v out @ 20 mhz
ad8055/AD8056 e6e rev. f v in e v p-p 10 4 0 05.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 9 5 3 1 7 6 2 8 g = +1 r l = 100  r f = 0  rise time and fall time e ns fall time rise time tpc 13. rise time and fall time vs. v in v in e v p-p 10 4 0 0 5.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 9 5 3 1 7 6 2 8 g = +1 r l = 1k  r f = 0  rise time and fall time e ns fall time rise time tpc 14. rise time and fall time vs. v in time e ns 020 10 e0.5 e0.4 30 settling time e % 40 50 60 e0.3 e0.2 e0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 v out = 0v to +2v or v out = 0v to e2v g = +2 r l = 100  tpc 15. settling time v in e v p-p 10 4 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 9 5 3 1 7 6 2 8 g = +2 r l = 100  r f = 402  fall time rise time and fall time e ns rise time tpc 16. rise time and fall time vs. v in rise time and fall time e ns v in e v p-p 5.0 2.0 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 4.5 2.5 1.5 0.5 3.5 3.0 1.0 4.0 g = +2 r l = 1k  r f = 402  fall time rise time tpc 17. rise time and fall time vs. v in frequency e mhz 0.1 500 110 100 0 e90 e10 e20 e30 e40 e50 e60 e70 e80 10 epsrr +psrr g = +2 r f = 402  psrr e db tpc 18. psrr vs. frequency
ad8055/AD8056 e7e rev. f tpc 19. overload recovery frequency e mhz 0.1 200 110 100 side 2 driven side 1 driven v in = 0dbm g = +2 r l = 100  r f = 402  e30 e120 e40 e50 e60 e70 e80 e90 e100 e110 e20 crosstalk e db tpc 20. crosstalk (output-to-output) vs. frequency frequency e mhz 0.1 500 110 100 0 e90 e10 e20 e30 e40 e50 e60 e70 e80 402  50  402  402  58  402  e100 cmrr e db tpc 21. cmrr vs. frequency tpc 22. overload recovery frequency e mhz 0.01 90 40 80 70 60 50 30 20 10 0 e10 0.1 1 10 100 500 open-loop gain e db r l = 100  tpc 23. open-loop gain vs. frequency 10k 45 90 0 e45 e90 100k 1m 10m 100m 500m 135 phase e degrees frequency e hz 180 tpc 24. phase vs. frequency
ad8055/AD8056 e8e rev. f e0.04 e0.02 0.00 0.02 0.04 1 back terminated load (150  ) g = +2 r f = 402  1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th ire e0.04 differential gain e % e0.02 0.00 0.02 0.04 1 back terminated load (150  ) g = +2 r f = 402  1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th ire differential phase e degrees tpc 25. differential gain and differential phase e0.04 differential gain e % e0.02 0.00 0.02 0.04 4 video loads (37.5  ) g = +2 r f = 402  1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th ire e0.15 e0.10 0.00 0.05 0.15 differential phase e degrees g = +2 r f = 402  1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th 4 video loads (37.5  ) 0.10 e0.05 ire tpc 26. differential gain and differential phase temperature e  c e55 5 e35 e15 4.5 2.5 3.5 3.0 25 45 65 85 105 125 5.0 r l = 150  r l = 50  r l = 1k  4.0 2.0 1.5 1.0 0.5 0 v s =  5v  v out e v tpc 27. output swing vs. temperature frequency e hz 1000 100 1 10 15m 100 voltage noise e nv hz 1k 10k 100k 1m 10m 10 6nv/ hz hz hz hz
ad8055/AD8056 ? rev. f applications four-line video driver the ad8055 is a useful low cost circuit for driving up to four video lines. for such an application, the amplifier is configured for a noninverting gain of 2 as shown in figure 3. the input video source is terminated in 75 ? and applied to the high impedance noninverting input. each output cable is connected to the op amp output via a 75 ? s eries back termination resistor for proper cable termination. the terminating resistors at the other ends of the lines will divide the output signal by two, which is compensated for by the gain-of-two of the op amp stage. for a single load, the differential gain error of this circuit was measured to be 0.01%, with a differential phase error of 0.02 degrees. the two load measurements were 0.02% and 0.03 degrees, respectively. for four loads, the differential gain error is 0.02%, while the differential phase increases to 0.1 de grees. 0.1  f 10  f 75  402  ad8055 75  +5v ?v 0.1  f 10  f 402  75  75  75  v in 75  75  75  75  v out1 v out2 v out3 v out4 6 7 2 3 4 figure 3. four-line video driver single-ended to differential line driver c reating differential signals from single-ended signals is required for driving balanced, twisted pair cables, differential input a/d converters, and other applications that require differential signals. this is sometimes accomplished by using an inverting and a non- inverting amplifier stage to create the complementary signals. the circuit shown in figure 4 shows how an AD8056 can be used to make a single-ended to differential converter that offers some advantages over the architecture mentioned above. each op amp is configured for unity gain by the feedback resistors from the outputs to the inverting inputs. in addition, each output drives the opposite op amp with a gain of ? by means of the crossed resistors. the result of this is that the outputs are complementary and there is high gain in the overall configuration. feedback techniques similar to a conventional op amp are used to control the gain of the circuit. from the noninverting input of amp 1 to the output of amp 2 is an inverting gain. between these points a feedback resistor can be used to close the loop. as in the case of a conventional op amp inverting gain stage, an input resistor is added to vary the gain. the gain of this circuit from the input to amp 1 output is r f /r i , while the gain to the output of amp 2 is ? f /r i . the circuit thus creates a balanced differential output signal from a single-ended input. the advantage of this circuit is that the gain can be changed by changing a single resistor and still maintain the balanced differential outputs. 75  r i 402  +5v r f 402  ?v AD8056 402  402  402  49.9  49.9  v in +v out 402  ? out 10  f 0.1  f 1 2 3 8 amp1 5 6 7 4 amp2 10  f 0.1  f figure 4. single-ended to differential line driver low noise, low power preamp t he ad8055 makes a good, low cost, low noise, low power preamp. a gain-of-10 preamp can be made with a feedback resistor of 909 ? and a gain resistor of 100 ? as shown in figure 5. the circuit has a ? db bandwidth of 20 mhz. 0.1  f 10  f +5v ?v 0.1  f10  f 909  v out + 100  r s ad8055 6 7 2 3 4 figure 5. low noise, low power preamp with g = +10 and bw = 20 mhz with a low source resistance ( ad8055/AD8056 ?0 rev. f power dissipation limits with a 10 v supply (total v cc ?v ee ), the quiescent power dissipation of the ad8055 in the sot-23-5 package is 65 mw, while the quiescent power dissipation of the ad 8056 in the msop is 120 mw. this translates into a 15.6 c rise above the ambient for the sot-23-5 package and a 24 c rise for the msop package. the power dissipated under heavy load conditions is approxi- mately equal to the supply voltage minus the output voltage, times the load current, plus the quiescent power computed above. this total power dissipation is then multiplied by the thermal resistance of the package to find the temperature rise, above ambient, of the part. the junction temperature should be kept below 150 c. the ad8055 in the sot-23-5 package can dissipate 270 mw w hile the AD8056 in the msop package can dissipate 325 mw (at 85 c ambient) without exceeding the maximum die temperature. in the case of the AD8056, this is greater than 1.5 v rms into 50 ? , eno ugh to accommodate a 4 v p-p sine wave signal on both outputs simultaneously. but since each output of the ad8055 or AD8056 is capable of supplying as much as 110 ma into a short circuit, a continuous short circuit condition will exceed the maximum safe junction temperature. resistor selection the following table is provided as a guide to resistor selection f or maintaining gain flatness vs. frequency for various values of gain. ? db bandwidth gain r f (  )r i (  ) (mhz) +1 0 300 +2 402 402 160 +5 1k 249 45 +10 909 100 20 driving capacitive loads when driving a capacitive load, most op amps will exhibit peaking in the frequency response just before the frequency rolls off. f igure 6 shows the responses for an AD8056 running at a gain of +2, with a 100 ? load that is shunted by various values of capacitance. it can be seen that under these conditions, the part is still stable with capacitive loads of up to 30 pf. frequency ?mhz 5 4 ? 0.3 500 110 100 1 ? ? ? 3 2 ? 0 normalized gain ?db c l = 30pf c l = 20pf c l = 10pf c l = 0pf 402  c l 100  402  50  v in = 0dbm figure 6. capacitive load drive in general, to minimize peaking or to ensure the stability for larger values of capacitive loads, a small series resistor, r s, can be added between the op amp output and the capacitor, c l . for the setup depicted in figure 7, the relationship between r s and c l was empirically derived and is shown in figure 8. r s was chosen to produce less than 1 db of peaking in the frequency re sponse. note also that after a sharp rise r s quickly settles to about 25 ? . v in = 0dbm 50  ad8055 v out +5v ?v 402  402  6 7 2 3 4 c l 0.1  f 10  f 0.1  f 10  f r s fet probe figure 7. setup for r s vs. c l c l ?pf r s ?  0 270 10 20 30 40 50 60 40 0 35 20 15 10 5 30 25 figure 8. r s vs. c l
ad8055/AD8056 ?1 rev. f 5-lead plastic surface-mount package [sot-23] (rt-5) dimensions shown in millimeters 2.90 pin 1 1.60 bsc 2.80 bsc 1.90 bsc 0.95 bsc 1 3 4 5 2 0.22 0.08 0.60 0.45 0.30 10  0  0.50 0.30 0.15 max seating plane 1.45 max 1.30 1.15 0.90 compliant to jedec standards mo-178aa 8-lead plastic dual-in-line package [pdip] (n-8) dimensions shown in inches and (millimeters) seating plane 0.015 (0.38) min 0.180 (4.57) max 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.060 (1.52) 0.050 (1.27) 0.045 (1.14) 8 1 4 5 0.295 (7.49) 0.285 (7.24) 0.275 (6.98) 0.100 (2.54) bsc 0.375 (9.53) 0.365 (9.27) 0.355 (9.02) 0.150 (3.81) 0.135 (3.43) 0.120 (3.05) 0.015 (0.38) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) controlling dimensions are in inches; millimeters dimensions (in parentheses) compliant to jedec standards mo-095aa 8-lead standard small outline package [soic] narrow body (r-8) dimensions shown in millimeters and (inches) 0.25 (0.0098) 0.19 (0.0075) 1.27 (0.0500) 0.41 (0.0160) 0.50 (0.0196) 0.25 (0.0099)  45  8  0  1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 85 4 1 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2440) 5.80 (0.2284) 0.51 (0.0201) 0.33 (0.0130) coplanarity 0.10 controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design compliant to jedec standards ms-012aa outline dimensions 8-lead msop package [msop] (rm-8) dimensions shown in millimeters 0.23 0.08 0.80 0.40 8  0  85 4 1 4.90 bsc pin 1 0.65 bsc 3.00 bsc seating plane 0.15 0.00 0.38 0.22 1.10 max 3.00 bsc compliant to jedec standards mo-187aa coplanarity 0.10
?2 c01063??0/02(f) printed in u.s.a. ad8055/AD8056 rev. f revision history location page 10/02?ata sheet changed from rev. e to rev. f. text changes to reflect extended temperature range for r-8, n-8 packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 changes to specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 changes to absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 figure 2 replaced . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 changes to ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 outline dimensions updated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7/01?ata sheet changed from rev. d to rev. e. tpc 24 replaced with new graph . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3/01?ata sheet changed from rev. c to rev. d.p edit to curve in tpc 23 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2/01?ata sheet changed from rev. b to rev. c. edits to text at top of specifications page (65 to 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2


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